N1005 IBM Research: lithography

<div class="MsoNormal" style="mso-layout-grid-align: none; mso-line-height-alt: 12.0pt; text-autospace: none;"><br /><div class="separator" style="clear: both; text-align: center;"></div><div class="separator" style="clear: both; text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhgLpHhYZ6CCXXlQhFXNDTKz37GiEcC5zPqSqXcnjTfJdBSHpDa198GxD1UhkdbSJx9F3g-dudSPNPa4lY3CuN3Rsvb2k0nItiIskXNz4BBDeBd-T3VFuhzaQviGCHL9JzzKriTO2U5bco/s1600/mattcolburn2.jpg" imageanchor="1" style="clear: left; float: left; margin-bottom: 1em; margin-right: 1em;"><img border="0" height="200" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhgLpHhYZ6CCXXlQhFXNDTKz37GiEcC5zPqSqXcnjTfJdBSHpDa198GxD1UhkdbSJx9F3g-dudSPNPa4lY3CuN3Rsvb2k0nItiIskXNz4BBDeBd-T3VFuhzaQviGCHL9JzzKriTO2U5bco/s200/mattcolburn2.jpg" width="159" /></a></div><i style="mso-bidi-font-style: normal;"><span style="font-family: "helvneue light for ibm" , sans-serif; font-size: 13.0pt;">Editor’s note: This article is by Matthew Colburn, PhD, senior manager Strategic Patterning Research, IBM Research</span></i></div><div class="MsoNormal" style="mso-layout-grid-align: none; text-autospace: none;"><br /></div><div class="MsoNormal" style="mso-layout-grid-align: none; text-autospace: none;"><span style="font-family: "helvneue light for ibm" , sans-serif; font-size: 13.0pt; line-height: 115%;">Last year, IBM Research and our partners announced </span><span style="font-family: "helvneue light for ibm" , sans-serif; font-size: 13.0pt; line-height: 115%;"><a href="https://www-03.ibm.com/press/us/en/pressrelease/47301.wss"><span style="mso-bidi-font-family: "Times New Roman";">the industry’s first functional 7nanometer node test chips</span></a></span><span class="MsoHyperlink"><span style="font-family: "helvneue light for ibm" , sans-serif; font-size: 13.0pt; line-height: 115%;">,</span></span><span style="font-family: "helvneue light for ibm" , sans-serif; font-size: 13.0pt; line-height: 115%;"> utilizing EUV Lithography. It represents the most significant chip-industry design and manufacturing innovations in nearly a decade.</span><br /><a name="more"></a></div><div class="MsoNormal" style="mso-layout-grid-align: none; text-autospace: none;"><br /></div><div class="MsoNormal" style="mso-layout-grid-align: none; text-autospace: none;"><span style="font-family: "helvneue light for ibm" , sans-serif; font-size: 13.0pt; line-height: 115%;">This week our Semiconductor Technology Research will announce the first successful inspection of a patterned Extreme Ultraviolet (EUV) mask through a novel EUV pellicle membrane. This breakthrough helps lay the foundation to integrate EUV lithography into the standard CMOS chip making process.<span style="mso-spacerun: yes;"></span></span><span style="font-family: "helvneue light for ibm" , sans-serif; font-size: 13.0pt; line-height: 115%;"> </span></div><div class="MsoNormal" style="mso-layout-grid-align: none; text-autospace: none;"><br /></div><div class="MsoNormal" style="mso-layout-grid-align: none; text-autospace: none;"><table cellpadding="0" cellspacing="0" class="tr-caption-container" style="float: right; margin-left: 1em; text-align: right;"><tbody><tr><td style="text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh4N2ZS-P447b0VrlVNox30MA1zHUCi3sjWvu63tjHiSg7wtx2BpgzJcZ5axmV9zeN4PvTrD2FU1X16ZkZg32NjJe8cVwW7YI27tPxu57jXt1Mk3AlE86ms-7gSEmbqMxpjB0W0VQ59DHyr/s1600/pellicle.jpg" imageanchor="1" style="clear: right; margin-bottom: 1em; margin-left: auto; margin-right: auto;"><img border="0" height="320" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh4N2ZS-P447b0VrlVNox30MA1zHUCi3sjWvu63tjHiSg7wtx2BpgzJcZ5axmV9zeN4PvTrD2FU1X16ZkZg32NjJe8cVwW7YI27tPxu57jXt1Mk3AlE86ms-7gSEmbqMxpjB0W0VQ59DHyr/s320/pellicle.jpg" width="319" /></a></td></tr><tr><td class="tr-caption" style="text-align: center;"><span style="font-family: "helvneue light for ibm" , sans-serif; font-size: small; line-height: 115%;">Image of mask used for<br />comparative inspection<br />(no pellicle top, half-pellicle bottom)</span></td></tr></tbody></table><span style="font-family: "helvneue light for ibm" , sans-serif; font-size: 13.0pt; line-height: 115%;">In semiconductor fabrication, a mask is used to print a circuit design on a silicon substrate. This mask is protected from environmental contamination by a protective film, called a pellicle, that is crucial for manufacturing yield.</span><br /><br /><span style="font-family: "helvneue light for ibm" , sans-serif; font-size: 13.0pt; line-height: 115%;">In this work, IBM has fabricated full size silicon nitride pellicle membranes that meets the industry’s target of 90 percent EUV transparency, using conventional semiconductor and MEMS fabrication methodologies. The differentiating feature of the IBM pellicle is its transparency at the industry standard inspection wavelength (193nm), which enables the use of existing infrastructure for through-pellicle mask defect inspection. Complete technical details of the first mask inspection through the IBM EUV pellicle will be discussed during the 2016 <a href="http://spie.org/conferences-and-exhibitions/advanced-lithography" target="_blank">SPIE Advanced LithographyConference</a> in San Jose, CA.</span><span style="font-family: "helvneue light for ibm" , sans-serif; font-size: 13.0pt; line-height: 115%;"> </span><br /><br /><table align="center" cellpadding="0" cellspacing="0" class="tr-caption-container" style="margin-left: auto; margin-right: auto; text-align: center;"><tbody><tr><td style="text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEg2IEXahKj6OvpEv4ujKmfJ8OC4iN-XCVTU1jfeTrnOfnpfjNU49t7cvgP3tmV-l0J_6Q9zPnziEOX2AORv7FRGzuh01nDkqCQMcInQplW-wtrMX55LGzDsgrqMDZP0gwNNsDVYrDTY0-hj/s1600/euv_scanner.jpg" imageanchor="1" style="margin-left: auto; margin-right: auto;"><img border="0" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEg2IEXahKj6OvpEv4ujKmfJ8OC4iN-XCVTU1jfeTrnOfnpfjNU49t7cvgP3tmV-l0J_6Q9zPnziEOX2AORv7FRGzuh01nDkqCQMcInQplW-wtrMX55LGzDsgrqMDZP0gwNNsDVYrDTY0-hj/s1600/euv_scanner.jpg" /></a></td></tr><tr><td class="tr-caption" style="text-align: center;"><span style="font-family: "helvneue light for ibm" , sans-serif; font-size: 13.0pt; line-height: 115%;">ASML NXE-3300B EUV scanner at </span><span style="font-family: "helvneue light for ibm" , sans-serif; font-size: 13.0pt; line-height: 115%;">IBM EUV Center of Excellence in Albany, NY</span></td></tr></tbody></table><br /><span style="font-family: "helvneue light for ibm" , sans-serif; font-size: 13.0pt; line-height: 115%;">The reported achievement is the culmination of several years of effort at the IBM T. J. Watson Research Center in Yorktown, NY, and part of IBM’s EUV Center of Excellence (COE) in Albany, NY – home to our ASML NXE-3300B EUV scanner. The IBM EUV CoE became operational in 2013 and focuses on driving a complete EUV solution that encompasses tooling, materials, process, mask-use, and computational capability for integration into the industry’s high volume semiconductor manufacturing solution. </span><br /><table align="center" cellpadding="0" cellspacing="0" class="tr-caption-container" style="margin-left: auto; margin-right: auto; text-align: center;"><tbody><tr><td style="text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhU3MfoxWVsRQ7WRJiBglgTMBw0jS5j5hZGwzECljodsa12np-jUat9ks4OEzhRdNRJnBWnqKn0kMiXT9CfYduECjbn4puziogz5z1Y8Yb4QmXsT3gfaJemE80783qLz7qwUaRvl2l71GI/s1600/pellicle_2.jpg" imageanchor="1" style="margin-left: auto; margin-right: auto;"><img border="0" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhU3MfoxWVsRQ7WRJiBglgTMBw0jS5j5hZGwzECljodsa12np-jUat9ks4OEzhRdNRJnBWnqKn0kMiXT9CfYduECjbn4puziogz5z1Y8Yb4QmXsT3gfaJemE80783qLz7qwUaRvl2l71GI/s1600/pellicle_2.jpg" /></a></td></tr><tr><td class="tr-caption" style="text-align: center;"><span style="font-family: "helvneue light for ibm" , sans-serif; font-size: 13.0pt; line-height: 115%;">Full size EUV pellicle membrane</span></td></tr></tbody></table><br /></div>

7nm lithography semiconductor IBM Research demonstrates critical advancement in EUV lithography infrastructure for 7nm node and beyond

Editor’s note: This article is by Matthew Colburn, PhD, senior manager Strategic Patterning Research, IBM Research Last year, IBM Research a...